Why Beeman Strong Traded Billions of Users for a Blank Slate at Rivos

Beeman Strong spent 26 years at Intel mastering x86 architecture. Then he left it all behind to start from scratch. 

Beeman joined Intel in 1996, right after earning his bachelor’s degree in electrical engineering. Over the next two and a half decades, he held roles as a Senior Validation Engineer, Processor Microarchitect, and ISA Architect Principal Engineer. He played a key role shaping the evolution of x86, gaining deep experience in instruction set design, system integration, and the hardware-software interface. 

But after nearly three decades at the same company, Beeman felt it was time to explore something different. The opportunity came when he reached out to his former Intel boss, Ved Shanbhogue, who had joined Rivos and encouraged Beeman to come on board. “They caught me at the right time,” Beeman said. “I never looked for another job while at Intel, but I realized that designing something completely from scratch was a once-in-a-lifetime opportunity.”

Beeman joined Rivos in October 2021 as part of the architecture team, where he helps define and evolve the RISC-V instruction set architecture (ISA) for Rivos’ chips. He chairs multiple RISC-V working groups in the global RISC-V community, shaping open ISA extensions that serve both Rivos and the broader ecosystem. Internally, he works cross-functionally with design, microarchitecture, and verification teams on key features like debug, trace, and performance monitoring. 

What Beeman values the most about Rivos is the clarity of purpose and alignment across teams. “At our age and size, it feels like people are pulling in the same direction,” he shared. “Everyone commits whether it went their way or not.” And while the startup pace is fast, the team makes it enjoyable for him.

Outside of work, Beeman enjoys spending time with his two teenage sons, traveling, cooking, and staying active.