Talks and Presentations
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OpenTitan Integrated: A RISC-V Open-Source Silicon Root-of-Trust for large SoCs
Modern System-on-Chips (SoCs) rely on a secure Root of Trust (RoT) as the foundation for all security services. Compromise of the RoT can have catastrophic consequences, undermining the security of…
The Significance of the RVA23 Profile in Advancing RISC-V Ecosystem ( RISC-V Summit Europe)
The RVA23 profile represents a key development in the RISC-V architecture, standardizing the 64-bit application processors ISA for seamless software portability across hardware implementations. This simplifies development and supports RISC-V…
The RISE Project: Advancing RISC-V Software ( RISC-V Summit Europe)
The RISC-V Software Ecosystem (RISE) Project is in high gear investing time and money on software to support RISC-V, including more than $500K on contracts for further enhancements. This talk…
Porting SLEEF to RISC-V
Join us as we explore the journey of porting the SLEEF vectorized math library to the RISC-V architecture, focused on ensuring complete support for single, double, and quad precision math…
Enabling New Security Frontiers: Deep-dive into implementing Confidential Computing on RISC-V
This session aims to cover ISA and non-ISA for Confidential VM Environment (CoVE) on RISC-V platforms. The session will describe the use of ratified RISC-V privileged ISA extensions and new…
Unleashing RISC-V in Managed Runtimes: Navigating Extensions, Memory Models, and Performance Challenges in OpenJDK
This talk explores how RISC-V ISA can be effectively integrated into OpenJDK, covering the challenges of handling cross-modifying code in JIT-compiled environments, the use of trampolines and load-imm sequences for…
RISC-V Server SoC Standardization
The RISC-V Server Ecosystem enablement discussion is a standardization effort to ensure compatibility and reliability across RISC-V server SoCs. This talk will cover key hardware capabilities, including harts, timers, PCIe…
